# Linux on the Arty board

**URL:** <https://forums.sifive.com/t/linux-on-the-arty-board/611>\
**Category:** Freedom E300\
**Created:** [June 27, 2017, 7:45am UTC](https://forums.sifive.com/t/linux-on-the-arty-board/611 "2017-06-27T07:45:46Z")\
**Posts on this page:** 11\
**Page:** 1

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**Author:** ![matt90](https://avatars.discourse-cdn.com/v4/letter/m/c68b51/32.png) [@matt90](https://forums.sifive.com/u/matt90)\
**Post date:** [June 27, 2017, 7:45am UTC](https://forums.sifive.com/t/linux-on-the-arty-board/611/1 "2017-06-27T07:45:46Z")

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Hello,

I have the Xilinx Artix-7 35T Arty FPGA Evaluation Kit and want to run Linux on it. I have found several different possibilities to build a Linux system for spike/qemu, but I do not know how to get it working on the arty board. Is there any short tutorial/readme howto get this working.

Thank you very much 🙂

Information I have read:

> [@Failure of riscv-linux](http://forums.sifive.com/t/failure-of-riscv-linux/170/9):
>
> Since spike doesn’t implement a virtual Ethernet device, eth0 being absent is expected. Keep in mind that the SDK is originally intended for use with the VC707 development board to which a physical NIC can be connected via PCIe. It should be possible to modify the buildroot to exclude the networking initscript. At this time, spike doesn’t support external block devices, so there is no way to mount additional filesystems. You will have to add whatever files you need to the buildroot initramfs…

> **[GitHub - riscvarchive/riscv-linux: RISC-V Linux Port](https://github.com/riscvarchive/riscv-linux)**
>
> RISC-V Linux Port. Contribute to riscvarchive/riscv-linux development by creating an account on GitHub.

> **[GitHub - sifive/freedom-u-sdk: Freedom U Software Development Kit (FUSDK)](https://github.com/sifive/freedom-u-sdk)**
>
> Freedom U Software Development Kit (FUSDK). Contribute to sifive/freedom-u-sdk development by creating an account on GitHub.

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**Author:** ![dagema](https://sea2.discourse-cdn.com/flex020/user_avatar/forums.sifive.com/dagema/32/59_2.png) [@dagema](https://forums.sifive.com/u/dagema)\
**Post date:** [June 27, 2017, 3:06pm UTC](https://forums.sifive.com/t/linux-on-the-arty-board/611/2 "2017-06-27T15:06:51Z")

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You can run PetaLinux on the new Z7 version of the Arty, but I do not believe the original Arty has enough resources.

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**Author:** ![matt90](https://avatars.discourse-cdn.com/v4/letter/m/c68b51/32.png) [@matt90](https://forums.sifive.com/u/matt90)\
**Post date:** [June 27, 2017, 3:22pm UTC](https://forums.sifive.com/t/linux-on-the-arty-board/611/3 "2017-06-27T15:22:15Z")

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Hello,

thank you the response.  
I have seen an article on a blog (link below), where someone runs linux on it?!

> **[RISC-V on an FPGA, pt. 7](https://rwmj.wordpress.com/2016/07/27/risc-v-on-an-fpga-pt-7/)**
>
> Today I’m going to try SiFive’s Freedom U500 64 bit RISC-V design on the very low-end $148 Arty Board. If you want more background into what SiFive are up to then I recommend watching t…

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**Author:** ![brucehoult](https://sea2.discourse-cdn.com/flex020/user_avatar/forums.sifive.com/brucehoult/32/24_2.png) [@brucehoult](https://forums.sifive.com/u/brucehoult)\
**Post date:** [June 27, 2017, 3:59pm UTC](https://forums.sifive.com/t/linux-on-the-arty-board/611/4 "2017-06-27T15:59:50Z")

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Wait … what is this “Z7”. Is there more than one model of Arty?

What I see in stores here is:

Xilinx Artix-35T FPGA (xc7a35ticsg324-1L)  
5,200 slices (each slice contains four 6-input LUTs and 8 flip-flops)

I’ve been trying to find out how much of the Arty a HiFive1 emulation takes, but no one seems to know/want to tell. By impression though was that there’d be plenty of space left for an MMU. And DDR3 controller…

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**Author:** ![brucehoult](https://sea2.discourse-cdn.com/flex020/user_avatar/forums.sifive.com/brucehoult/32/24_2.png) [@brucehoult](https://forums.sifive.com/u/brucehoult)\
**Post date:** [June 27, 2017, 4:04pm UTC](https://forums.sifive.com/t/linux-on-the-arty-board/611/5 "2017-06-27T16:04:05Z")

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Aha … so you actually need this one?

> **[Arty Z7: Zynq-7000 SoC Development Board](https://digilent.com/shop/arty-z7-zynq-7000-soc-development-board/)**
>
> Shop now for USB test and measurement devices, FPGA development boards, programming solutions and educational products.

For the minor extra cost the -20 seems maybe worth getting. Three times more LUTs, flip-flpps and static RAM! 630 KB ought to be enough for anyone.

Comment there:

> Posted by Josh on 15th Jun 2017

> I have managed to get Ubuntu 16.04 running on the Arty Z7-20. All hardware appears to work reliably.

Of course he means on the embedded ARM.

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**Author:** ![mwachs5](https://sea2.discourse-cdn.com/flex020/user_avatar/forums.sifive.com/mwachs5/32/13_2.png) [@mwachs5](https://forums.sifive.com/u/mwachs5)\
**Post date:** [June 27, 2017, 4:05pm UTC](https://forums.sifive.com/t/linux-on-the-arty-board/611/6 "2017-06-27T16:05:32Z")

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Matt,

Thanks for your question. We previously supported a Linux-capable RISC-V core on Arty (which is what the wordpress article is referring to), but there has been so much progress both in the HW codebase and Linux-land that the project became out of date. The Arty is certainly capable of supporting a Linux-capable core.

Megan

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**Author:** ![brucehoult](https://sea2.discourse-cdn.com/flex020/user_avatar/forums.sifive.com/brucehoult/32/24_2.png) [@brucehoult](https://forums.sifive.com/u/brucehoult)\
**Post date:** [June 27, 2017, 4:26pm UTC](https://forums.sifive.com/t/linux-on-the-arty-board/611/7 "2017-06-27T16:26:22Z")

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Yeah, reading the article, it’s from a year ago and so clearly on the 35T board, not Z7 – which is now $99 not $140. The low end Z7 with far more LUTs is now $140.

Are they compatable? Will any design which works on the older smaller board simply work out of the box on the newer one? i.e. the peripherals need the same interfaces on the FPGA etc

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**Author:** ![matt90](https://avatars.discourse-cdn.com/v4/letter/m/c68b51/32.png) [@matt90](https://forums.sifive.com/u/matt90)\
**Post date:** [June 27, 2017, 7:52pm UTC](https://forums.sifive.com/t/linux-on-the-arty-board/611/8 "2017-06-27T19:52:52Z")

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Thank you for your answer Megan.  
Is it still possible to get the old sources?  
Do you know where I can download the outdated software to run Linux on the Arty 35T?

Thanks a lot 🙂

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**Author:** ![haizzus](https://avatars.discourse-cdn.com/v4/letter/h/e36b37/32.png) [@haizzus](https://forums.sifive.com/u/haizzus)\
**Post date:** [June 7, 2018, 3:39am UTC](https://forums.sifive.com/t/linux-on-the-arty-board/611/9 "2018-06-07T03:39:45Z")

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Did you find what you were looking for? I’m interested in Linux on 35T too.

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**Author:** ![thornschuh](https://sea2.discourse-cdn.com/flex020/user_avatar/forums.sifive.com/thornschuh/32/134_2.png) [@thornschuh](https://forums.sifive.com/u/thornschuh)\
**Post date:** [June 10, 2018, 6:51pm UTC](https://forums.sifive.com/t/linux-on-the-arty-board/611/10 "2018-06-10T18:51:15Z")

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BTW: Digilent in the meantime has also a 100K variant of the Arty A7, with 249USD a more expensive, but still affordable.

Bur does it really makes sense to run Linux on a ~50 Mhz Core? Only in case you want to change and test the core design. For software development QEMU schould be much faster.

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**Author:** ![thornschuh](https://sea2.discourse-cdn.com/flex020/user_avatar/forums.sifive.com/thornschuh/32/134_2.png) [@thornschuh](https://forums.sifive.com/u/thornschuh)\
**Post date:** [June 10, 2018, 7:02pm UTC](https://forums.sifive.com/t/linux-on-the-arty-board/611/11 "2018-06-10T19:02:18Z")

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Arty Z7 uses ZYNQ, which uses the same FPGA architecture than ARTIX (structure of CLBs, BRAMs, etc), but ZYNQ has a lot of hard blocks like Gigabit Ethernet, DRAM Controller, two Cortex A9 cores in its „processing system“, and boards like Arty Z7 connect their external hardware (like DRAM ) to these cores.  
So when you want to access this hardware from a RISC-V softcore in the FPGA you need a complete different approach.  
So basically a design for the Arty A35 will not run on the Z7.  
On the other hand I already thought about the idea of running a softcore on a ZYNQ, when you connect it to the AXI ACP port of the processing system it could leverage the large L2 cache normally used for the A9 cores to access the DRAM.
