# HART Context

**URL:** <https://forums.sifive.com/t/hart-context/4602>\
**Category:** HiFive1 Rev B\
**Created:** [April 5, 2021, 10:15pm UTC](https://forums.sifive.com/t/hart-context/4602 "2021-04-05T22:15:06Z")\
**Posts on this page:** 5\
**Page:** 1

<div class="post-metadata">

**Author:** ![bsvtgc](https://avatars.discourse-cdn.com/v4/letter/b/ce7236/32.png) [@bsvtgc](https://forums.sifive.com/u/bsvtgc)\
**Post date:** [April 5, 2021, 10:15pm UTC](https://forums.sifive.com/t/hart-context/4602/1 "2021-04-05T22:15:06Z")

</div>

Is there a function in metal library which can be used to save current HART’s context for Hifive1 Rev B?

I am looking to back up current HART’s context in exception handler.

---

<div class="post-metadata">

**Author:** ![xiahua](https://avatars.discourse-cdn.com/v4/letter/x/a88e4f/32.png) [@xiahua](https://forums.sifive.com/u/xiahua)\
**Post date:** [April 10, 2021, 5:31pm UTC](https://forums.sifive.com/t/hart-context/4602/2 "2021-04-10T17:31:59Z")

</div>

From my experience of reading the FreeRTOS and other OS source code, this saving context process has to be written in assembly language, because C cannot do register level things.

You need to use asm to get access to the registers and save them on the stack frame when switch out. Read the stack frame and load the register when switch in.

It is called trap.S

---

<div class="post-metadata">

**Author:** ![bruce](https://sea2.discourse-cdn.com/flex020/user_avatar/forums.sifive.com/bruce/32/452_2.png) [@bruce](https://forums.sifive.com/u/bruce)\
**Post date:** [April 10, 2021, 10:30pm UTC](https://forums.sifive.com/t/hart-context/4602/3 "2021-04-10T22:30:14Z")

</div>

Generally, declaring your exception handler as “ **attribute** ((interrupt))” is sufficient as the C compiler then generates the necessary instructions to save all necessary registers on to the current stack.

Only if you want to do something else (e.g. switch stacks first, save registers in a global area, return to a different thread) do you need something else.

---

<div class="post-metadata">

**Author:** ![bsvtgc](https://avatars.discourse-cdn.com/v4/letter/b/ce7236/32.png) [@bsvtgc](https://forums.sifive.com/u/bsvtgc)\
**Post date:** [April 11, 2021, 6:27pm UTC](https://forums.sifive.com/t/hart-context/4602/4 "2021-04-11T18:27:59Z")

</div>

HI Bruce,

Yes, I need to backup in a specific location in custom order. Is there any existing leeway to make my job easier?

---

<div class="post-metadata">

**Author:** ![bruce](https://sea2.discourse-cdn.com/flex020/user_avatar/forums.sifive.com/bruce/32/452_2.png) [@bruce](https://forums.sifive.com/u/bruce)\
**Post date:** [April 11, 2021, 11:47pm UTC](https://forums.sifive.com/t/hart-context/4602/5 "2021-04-11T23:47:24Z")

</div>

If you need something nonstandard such as a custom order of the registers then I don’t know how something standard would help you? Just write a few lines of assembly language.
