# FU740/FU540 Documentation errata?
**URL:** https://forums.sifive.com/t/fu740-fu540-documentation-errata/4637
**Category:** HiFive Unmatched
**Created:** [April 21, 2021, 5:12pm UTC](https://forums.sifive.com/t/fu740-fu540-documentation-errata/4637 "2021-04-21T17:12:17Z")
**Posts on this page:** 3
**Page:** 1
### Author:  [@jstraus](https://forums.sifive.com/u/jstraus)
#### Post date: [April 21, 2021, 5:12pm UTC](https://forums.sifive.com/t/fu740-fu540-documentation-errata/4637/1 "2021-04-21T17:12:17Z")
Section **23.3 Reset and Initialization** of the [HiFive Unmatched manual](https://sifive.cdn.prismic.io/sifive/18febb04-50b6-4880-9bf3-631e40daa809_fu740-c000-manual-v1p2.pdf) includes the following:
> 1. The DDR PHY configuration registers from address 0x100B\_5200 to 0x100B\_52F8
> are set.
> 2. The DDR PHY configuration registers from address 0x100B\_4000 to 0x100B\_51FC
> are set.
But these addresses are marked as Reserved in the memory map.
Is the initialization description correct, and this is an undocumented area of the memory map, or is the description perhaps wrong about the locations that are accessed?
(The FU540 manual has the same reference, but when I run the FSBL code in [demo-coreip-cli-freedom-u540-2021.03.01.rootfs.wic](https://github.com/sifive/freedom-u-sdk/releases/tag/2021.03.01) on the Imperas simulator FU540 model I do not see these locations accessed)
---
### Author:  [@jimw](https://forums.sifive.com/u/jimw)
#### Post date: [April 21, 2021, 5:45pm UTC](https://forums.sifive.com/t/fu740-fu540-documentation-errata/4637/2 "2021-04-21T17:45:49Z")
For HiFive Unleashed bootloader, we have
[https://github.com/sifive/freedom-u540-c000-bootloader/blob/master/sifive/platform.h#L171](https://github.com/sifive/freedom-u540-c000-bootloader/blob/master/sifive/platform.h#L171)
which agrees with the memory map. I don’t know where this code lives in current sources though. I’ve asked for someone to look at this.
---
### Author:  [@jimw](https://forums.sifive.com/u/jimw)
#### Post date: [April 21, 2021, 7:25pm UTC](https://forums.sifive.com/t/fu740-fu540-documentation-errata/4637/3 "2021-04-21T19:25:11Z")
I was curious, so after a bit of searching, I found
[https://github.com/sifive/meta-sifive/blob/2021.03/recipes-bsp/u-boot/files/unmatched/0017-riscv-sifive-dts-fu740-add-U-Boot-dmc-node.patch](https://github.com/sifive/meta-sifive/blob/2021.03/recipes-bsp/u-boot/files/unmatched/0017-riscv-sifive-dts-fu740-add-U-Boot-dmc-node.patch)
and this upstream for fu540
[https://source.denx.de/u-boot/u-boot/-/blob/master/arch/riscv/dts/fu540-c000-u-boot.dtsi#L78](https://source.denx.de/u-boot/u-boot/-/blob/master/arch/riscv/dts/fu540-c000-u-boot.dtsi#L78)
I filed an internal bug report.