# Freedom E300 MCS file not working

**URL:** <https://forums.sifive.com/t/freedom-e300-mcs-file-not-working/710>\
**Category:** Freedom E300\
**Created:** [August 25, 2017, 2:45am UTC](https://forums.sifive.com/t/freedom-e300-mcs-file-not-working/710 "2017-08-25T02:45:31Z")\
**Posts on this page:** 1\
**Showing post:** 5

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**Author:** ![mwachs5](https://sea2.discourse-cdn.com/flex020/user_avatar/forums.sifive.com/mwachs5/32/13_2.png) [@mwachs5](https://forums.sifive.com/u/mwachs5)\
**Post date:** [August 29, 2017, 2:49pm UTC](https://forums.sifive.com/t/freedom-e300-mcs-file-not-working/710/5 "2017-08-29T14:49:59Z")

</div>

Ah, I see now. With our updates to the Freedom repository, we need to update our openocd.cfg files to work with it properly. But since we have not yet uploaded the pre-built MCS versions from the current freedom repo to [sifive.com](http://sifive.com), the freedom-e-sdk is still configured to work with the old one.

If you are building your own MCS files, you can change the following lines:

- Just remove the “expected ID” part from this.  
[https://github.com/sifive/freedom-e-sdk/blob/master/bsp/env/freedom-e300-arty/openocd.cfg#L16](https://github.com/sifive/freedom-e-sdk/blob/master/bsp/env/freedom-e300-arty/openocd.cfg#L16)  
This will solve this error:

```auto
Warn : JTAG tap: riscv.cpu UNEXPECTED: 0x20000913 (mfg: 0x489 (), part: 0x0000, ver: 0x2)
Error: JTAG tap: riscv.cpu expected 1 of 1: 0x10e31913 (mfg: 0x489 (), part: 0x0e31, ver: 0x1)

```

- Since OpenOCD can no longer look up the SPI Control address by JTAG ID, we need to explicitly tell it where the Flash Memory control address is. So add `0x10014000` to the end of this line:  
[https://github.com/sifive/freedom-e-sdk/blob/master/bsp/env/freedom-e300-arty/openocd.cfg#L22](https://github.com/sifive/freedom-e-sdk/blob/master/bsp/env/freedom-e300-arty/openocd.cfg#L22)

That will solve the error

```auto
Error: Device ID 0x20000913 is not known as FESPI capable

```

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