# FPGA alternatives for evals: Xilinx Artix A200 FPGA in a M.2 2280 M key form-factor **URL:** \ **Category:** General\ **Created:** [May 30, 2019, 11:44pm UTC](https://forums.sifive.com/t/fpga-alternatives-for-evals-xilinx-artix-a200-fpga-in-a-m-2-2280-m-key-form-factor/2420 "2019-05-30T23:44:51Z")\ **Posts on this page:** 4\ **Page:** 1
**Author:** ![rboissy](https://avatars.discourse-cdn.com/v4/letter/r/9f8e36/32.png) [@rboissy](https://forums.sifive.com/u/rboissy)\ **Post date:** [May 30, 2019, 11:44pm UTC](https://forums.sifive.com/t/fpga-alternatives-for-evals-xilinx-artix-a200-fpga-in-a-m-2-2280-m-key-form-factor/2420/1 "2019-05-30T23:44:51Z")
Hi, Sorry if this is a dumb question. Would the following FPGA devices be suitable for the evaluation of SiFive CPU cores (e.g., larger area U74-MC)? If so, are evaluation bitstreams available for the U74-MC? > **[NiteFury](https://www.crowdsupply.com/rhs-research/nitefury)** > > An Artix-7 FPGA with its own DDR3 RAM right in your laptop - for developing PCIe, etc. [https://github.com/RHSResearchLLC/NiteFury\*](https://github.com/RHSResearchLLC/NiteFury*) (\*) the specifications on the GitHub page are incorrect (the CrowdSupply page specs are correct) > **[Aller Artix-7 FPGA Board with M.2 Interface | Numato Lab](https://numato.com/product/aller-artix-7-m-2-fpga-module)** > > Aller is specifically designed for development and integration of FPGA based accelerated features into other larger designs, it can be used with laptops, desktops, and servers featuring standard 2280… [https://store.squirrelsresearch.com/](https://store.squirrelsresearch.com/) > **[Frequently Asked Questions | SQRL](http://squirrelsresearch.com/faq/)** > > What is Acorn? How does Acorn work? What CPU do I need? Can I load my own bitstreams on Acorn? Get all the answers for cryptocurrency mining with Acorn. Thanks, Robert ---
**Author:** ![bruce](https://sea2.discourse-cdn.com/flex020/user_avatar/forums.sifive.com/bruce/32/452_2.png) [@bruce](https://forums.sifive.com/u/bruce)\ **Post date:** [May 31, 2019, 1:11am UTC](https://forums.sifive.com/t/fpga-alternatives-for-evals-xilinx-artix-a200-fpga-in-a-m-2-2280-m-key-form-factor/2420/2 "2019-05-31T01:11:21Z")
There are certainly plenty of LUTs etc on those boards and as they all use Xilinx Artix-7 FPGAs they can use our existing workflow for the Arty A7-100T. Every FPGA board has different I/O, different RAM etc and needs a customised “FPGA Shell” definition for it, and produces a different bitstream. A bitstream for one board will not work on another board. If you are familiar with developing for FPGAs and are doing your own Verilog projects using one of these boards, know how to configure the IO, and know how to load bitstreams on to it then you should not have much difficulty in modifying our Arty A7-100T configuration to use different Xilinx-based boards, such as these. We don’t have these boards, we don’t have engineering resources to do the work to support them, but if you make them work we’ll happily accept pull requests to include support for them in our repository. ---
**Author:** ![rboissy](https://avatars.discourse-cdn.com/v4/letter/r/9f8e36/32.png) [@rboissy](https://forums.sifive.com/u/rboissy)\ **Post date:** [May 31, 2019, 11:45am UTC](https://forums.sifive.com/t/fpga-alternatives-for-evals-xilinx-artix-a200-fpga-in-a-m-2-2280-m-key-form-factor/2420/3 "2019-05-31T11:45:03Z")
Hi Bruce, Thank you for your reply. If they can be made to work, the form-factor of these boards is very appealing to me. I’ll see what I can do to retain a qualified individual or company who may be able to accomplish that objective and submit the necessary pull request. Can you estimate when the U74-MC CPUs will be available in the Core Designer? Or did I miss something–it seems that they can’t be selected yet, i.e., for customization? Robert ---
**Author:** ![bruce](https://sea2.discourse-cdn.com/flex020/user_avatar/forums.sifive.com/bruce/32/452_2.png) [@bruce](https://forums.sifive.com/u/bruce)\ **Post date:** [May 31, 2019, 7:09pm UTC](https://forums.sifive.com/t/fpga-alternatives-for-evals-xilinx-artix-a200-fpga-in-a-m-2-2280-m-key-form-factor/2420/4 "2019-05-31T19:09:26Z")
Hi Robert, I’m not sure on the timeline for customisable U74-MC. It’s our newest core, and before we make user-customisation available we have to do a lot of verification that the entire design space available actually makes sense and will work correctly. If you press the “Get U74” button you’ll see we have a single core U74 bitstream available, with 256 KB L2 cache and several AXI4 ports, including a 128 bit wide memory port. That should be enough for a fairly good evaluation, but if you need some particular other configuration then you can contact our sales team and we can make a customised version.