First is a miswrite, In P15 CLINT Vectored Mode:
The interrupt handler offset is calculated by mtvec.base + (mtvec.code * 4).
I think here the mtvec.code -> mcause.code
Following is the thing I want to check
#1 P6 Trap Example
The software sets up the system for a context switch, and then an ECALL instruction is executed which synchronously switches control to the environmentcall-from-User mode exception handler.
I wander to know whether the sets up means prepare the ecall args(like a6, a7, …)
Cause the words in P34 Context Switch Overhead make me confused, does the sets up means save the 32+ registers ?
#2 About the CLINT Vector Mode
In RISC-V Manual Volume II:
When MODE=Vectored, all synchronous exceptions into machine mode cause the pc to be set to the address in the BASE field, whereas interrupts cause the pc to be set to the address in the BASE field plus four times the interrupt cause number.
Does the exception handler is same with the ID=0 interrupt handler(User software interrupt) ?