# Debug interrupt didn't clear - what does it mean?

**URL:** <https://forums.sifive.com/t/debug-interrupt-didnt-clear-what-does-it-mean/893>\
**Category:** HiFive1 Rev B\
**Created:** [November 21, 2017, 12:37pm UTC](https://forums.sifive.com/t/debug-interrupt-didnt-clear-what-does-it-mean/893 "2017-11-21T12:37:42Z")\
**Posts on this page:** 3\
**Page:** 1

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**Author:** ![dvc](https://sea2.discourse-cdn.com/flex020/user_avatar/forums.sifive.com/dvc/32/892_2.png) [@dvc](https://forums.sifive.com/u/dvc)\
**Post date:** [November 21, 2017, 12:37pm UTC](https://forums.sifive.com/t/debug-interrupt-didnt-clear-what-does-it-mean/893/1 "2017-11-21T12:37:42Z")

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Hi!

I keep getting this error message, but I don’t know what it means or why openocd/gdb keep crashing. What could be causing this?

```auto
Error: Timed out waiting for debug int to clear.Increase timeout with riscv set_command_timeout_sec.
Error: Debug interrupt didn't clear.
Error: Debug RAM 0x0: 0x7b046073
Error: Debug RAM 0x1: 0xf1402473
Error: Debug RAM 0x2: 0x10802623
Error: Debug RAM 0x3: 0x3f80006f
Error: Debug RAM 0x4: 0x4000f063
Error: Debug RAM 0x5: 0x80000004
Error: Debug RAM 0x6: 0x00000000
Error: Debug RAM 0x7: 0x7ffffeb9
Error: Debug RAM 0x8: 0x00000000
Error: Debug RAM 0x9: 0x00000000
Error: Debug RAM 0xa: 0x00000000
Error: Debug RAM 0xb: 0x00000000
Error: Debug RAM 0xc: 0x00000000
Error: Debug RAM 0xd: 0x00000000
Error: Debug RAM 0xe: 0x00000000
Error: Debug RAM 0xf: 0x00000000
Error: cache_write() failed.

```

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<div class="post-metadata">

**Author:** ![mwachs5](https://sea2.discourse-cdn.com/flex020/user_avatar/forums.sifive.com/mwachs5/32/13_2.png) [@mwachs5](https://forums.sifive.com/u/mwachs5)\
**Post date:** [November 21, 2017, 8:55pm UTC](https://forums.sifive.com/t/debug-interrupt-didnt-clear-what-does-it-mean/893/2 "2017-11-21T20:55:23Z")

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Are you sure your chip has not put itself to sleep and/or is in reset, or has turned off its clocks? If you are using the “safe bootloader” mode (instructions are in the [https://www.sifive.com/documentation/boards/hifive1/hifive1-getting-started-guide/](https://www.sifive.com/documentation/boards/hifive1/hifive1-getting-started-guide/)) do you still get the same behavior?

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<div class="post-metadata">

**Author:** ![dvc](https://sea2.discourse-cdn.com/flex020/user_avatar/forums.sifive.com/dvc/32/892_2.png) [@dvc](https://forums.sifive.com/u/dvc)\
**Post date:** [November 22, 2017, 9:55am UTC](https://forums.sifive.com/t/debug-interrupt-didnt-clear-what-does-it-mean/893/3 "2017-11-22T09:55:41Z")

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yes, going to sleep was the problem. the deadly combination was  
disabling all external interrupts and then wfi. thanks!