# HiFive1 Rev B

**URL:** https://forums.sifive.com/c/hifive1/9.md

[Latest](https://forums.sifive.com/latest.md) · [Categories](https://forums.sifive.com/categories.md)

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## [About the HiFive1 Rev B category](https://forums.sifive.com/t/about-the-hifive1-rev-b-category/151)

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**Author:** [@phil.dworsky](https://forums.sifive.com/u/phil.dworsky)\
**Replies:** 0\
**Last updated:** [November 11, 2020, 8:00am UTC](https://forums.sifive.com/t/about-the-hifive1-rev-b-category/151 "2020-11-11T08:00:00Z")

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Discussions, News, and Information about the HiFive1 and HiFive1 Rev B Dev Kits. https://sifive.com/boards/hifive1-rev-b

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## [Accessing Vector Registers in spike simulator](https://forums.sifive.com/t/accessing-vector-registers-in-spike-simulator/7073)

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**Author:** [@Chaitu](https://forums.sifive.com/u/Chaitu)\
**Replies:** 2\
**Last updated:** [May 12, 2025, 11:12pm UTC](https://forums.sifive.com/t/accessing-vector-registers-in-spike-simulator/7073 "2025-05-12T23:12:39Z")

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I am trying to write a custom instruction that does matrix multiplication. I pre loaded the rows of matrix B into the vector registers shown below: asm volatile( “vsetvli t0, %\[col\_b\], e32, m1\\n\\t” “vle32.v v0, (%\[B1\]…

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## [Device recognised with WINUSB productID on Linux](https://forums.sifive.com/t/device-recognised-with-winusb-productid-on-linux/6840)

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**Author:** [@xsimplex](https://forums.sifive.com/u/xsimplex)\
**Replies:** 1\
**Last updated:** [March 8, 2025, 7:02pm UTC](https://forums.sifive.com/t/device-recognised-with-winusb-productid-on-linux/6840 "2025-03-08T19:02:36Z")

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Hi, I’m trying to set up a Rev 1 B on my Arch Linux machine by following the Getting Started guide but cannot get any usable connection. If I try to connect using the suggested sudo screen /dev/ttyACM0 115200 command, …

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## [How to configure and enable pwm1 in Hifive1 Rev B](https://forums.sifive.com/t/how-to-configure-and-enable-pwm1-in-hifive1-rev-b/7090)

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**Author:** [@bsvtgc](https://forums.sifive.com/u/bsvtgc)\
**Replies:** 2\
**Last updated:** [March 12, 2025, 3:45pm UTC](https://forums.sifive.com/t/how-to-configure-and-enable-pwm1-in-hifive1-rev-b/7090 "2025-03-12T15:45:06Z")

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Hi, I try to trigger pwm1 and capture the waveform on scope. Here are my changes. Set Gpio1 as IO function pin in gpio iof register. 0x10012038: 0x00000002 Select PWM function for gpio1 in iof select register. 0x1…

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## [Watch out Noob coming through](https://forums.sifive.com/t/watch-out-noob-coming-through/1100)

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**Author:** [@lombumc4](https://forums.sifive.com/u/lombumc4)\
**Replies:** 3\
**Last updated:** [March 14, 2018, 5:04am UTC](https://forums.sifive.com/t/watch-out-noob-coming-through/1100 "2018-03-14T05:04:07Z")

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Really interested in the potential of the HiFive1, except I’m so lost. I have recent installed all software tools and have been looking for a way to view/implement RISC-V from the HiFive. I am unaware if i need Freedom …

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## [Ada bare-metal and HiFive1](https://forums.sifive.com/t/ada-bare-metal-and-hifive1/1817)

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**Author:** [@cjmaverickforever](https://forums.sifive.com/u/cjmaverickforever)\
**Replies:** 3\
**Last updated:** [November 27, 2018, 9:22pm UTC](https://forums.sifive.com/t/ada-bare-metal-and-hifive1/1817 "2018-11-27T21:22:02Z")

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Hello, I want to ask someone to make an sfp and math port for HiFive1. I am just a beginner, so it would be hard for me to understand what should be done and in what order. But I will be glad if someone provide me with a…

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## [Is it possible to bypass RevB's J-Link OB and use FTDI + OpenOCD instead?](https://forums.sifive.com/t/is-it-possible-to-bypass-revbs-j-link-ob-and-use-ftdi-openocd-instead/3922)

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**Author:** [@yunus](https://forums.sifive.com/u/yunus)\
**Replies:** 8\
**Last updated:** [November 13, 2024, 2:24am UTC](https://forums.sifive.com/t/is-it-possible-to-bypass-revbs-j-link-ob-and-use-ftdi-openocd-instead/3922 "2024-11-13T02:24:39Z")

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Hi folks, I am developing a RISC-V based toolchain, and I am interested in buying the RevB board. My main reason for getting one is to test my FTDI + OpenOCD toolchain with a working RISC-V debug module. My own setup w…

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## [Couldnt store floating point result](https://forums.sifive.com/t/couldnt-store-floating-point-result/1660)

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**Author:** [@daniel](https://forums.sifive.com/u/daniel)\
**Replies:** 20\
**Last updated:** [November 11, 2024, 1:37pm UTC](https://forums.sifive.com/t/couldnt-store-floating-point-result/1660 "2024-11-11T13:37:45Z")

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I want to hold a floating point data in a variable ,when i use float data type it is not working it seems!. when i change it to an integer i get the values.But i need exact values.What should i do?

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## [FreedomU540 Freedom U500](https://forums.sifive.com/t/freedomu540-freedom-u500/6495)

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**Author:** [@Winston](https://forums.sifive.com/u/Winston)\
**Replies:** 1\
**Last updated:** [October 28, 2024, 8:36am UTC](https://forums.sifive.com/t/freedomu540-freedom-u500/6495 "2024-10-28T08:36:50Z")

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I have read the debug module descriptions in 23 and 24 of the Freedom U540 manual. Now I need to verify the Freedom U500. I need to use registers to send interrupts to stop the core and enter single-step debugging. I wou…

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## [Freedom U500 in 2024](https://forums.sifive.com/t/freedom-u500-in-2024/6667)

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**Author:** [@tungnguyen](https://forums.sifive.com/u/tungnguyen)\
**Replies:** 0\
**Last updated:** [October 28, 2024, 8:30am UTC](https://forums.sifive.com/t/freedom-u500-in-2024/6667 "2024-10-28T08:30:11Z")

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Hi, Sorry for my incorrect category I want to install Freedom U500 for my project SoC at university. But the installation guide at the link githup: (GitHub - sifive/freedom: Source files for SiFive's Freedom platforms) …

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## [Setting up an interrupt in a Sparkfun Red Thing V Plus in RISC-V](https://forums.sifive.com/t/setting-up-an-interrupt-in-a-sparkfun-red-thing-v-plus-in-risc-v/6649)

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**Author:** [@JuliusO](https://forums.sifive.com/u/JuliusO)\
**Replies:** 1\
**Last updated:** [October 24, 2024, 1:04pm UTC](https://forums.sifive.com/t/setting-up-an-interrupt-in-a-sparkfun-red-thing-v-plus-in-risc-v/6649 "2024-10-24T13:04:23Z")

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Hello, I’m trying to set up an interrupt in RISC-V using an external pushbutton called S1 connected to a GPIO pin. When S1 is pressed, it should trigger an interrupt, go to an ISR called S1\_interrupt and turn on an LED …

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## [GPIO input ports](https://forums.sifive.com/t/gpio-input-ports/6347)

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**Author:** [@Foer](https://forums.sifive.com/u/Foer)\
**Replies:** 2\
**Last updated:** [October 15, 2024, 7:59pm UTC](https://forums.sifive.com/t/gpio-input-ports/6347 "2024-10-15T19:59:54Z")

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Hello! I’m really hoping to get some help here as I’ve already spent several days trying to figure out what’s going on. I’m trying to learn low-level development, without using libraries (C or assembler, openosd). I re…

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## [Question Regarding PMP Configuration in Custom SoCs](https://forums.sifive.com/t/question-regarding-pmp-configuration-in-custom-socs/6548)

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**Author:** [@yakmg3000](https://forums.sifive.com/u/yakmg3000)\
**Replies:** 4\
**Last updated:** [August 30, 2024, 10:17am UTC](https://forums.sifive.com/t/question-regarding-pmp-configuration-in-custom-socs/6548 "2024-08-30T10:17:32Z")

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I remember that, in the past, custom SoCs could exclude PMP even when U mode and S mode were configured. Is this correct? Currently, when U mode is enabled in CPU mode, equipping PMP is mandatory. If a customer requests …

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## [MSEL dip switches](https://forums.sifive.com/t/msel-dip-switches/6530)

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**Author:** [@aporva](https://forums.sifive.com/u/aporva)\
**Replies:** 5\
**Last updated:** [August 1, 2024, 9:07am UTC](https://forums.sifive.com/t/msel-dip-switches/6530 "2024-08-01T09:07:27Z")

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Hi, I am using HiFive unmatched RevB SiFive Freedom U740 SoC. I am able to run using the dip switch modes set to SD card i.e. 1011 setting. Whereas am trying to Rescue image from flash (preprogrammed) (0110), or loops…

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## [Writing to the External QSPI Flash Memory](https://forums.sifive.com/t/writing-to-the-external-qspi-flash-memory/6401)

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**Author:** [@Utkk](https://forums.sifive.com/u/Utkk)\
**Replies:** 5\
**Last updated:** [July 11, 2024, 6:51pm UTC](https://forums.sifive.com/t/writing-to-the-external-qspi-flash-memory/6401 "2024-07-11T18:51:58Z")

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Hello everyone, In the memory map of the board HiFive1 Rev B, I have seen that QSPI Flash region is write-protected, only read and execute are allowed. I could read lines of the QSPI flash by simply accessing with point…

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## [Can the data from flash memory be cached in hifive1-revb?](https://forums.sifive.com/t/can-the-data-from-flash-memory-be-cached-in-hifive1-revb/6498)

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**Author:** [@bsvtgc](https://forums.sifive.com/u/bsvtgc)\
**Replies:** 4\
**Last updated:** [June 28, 2024, 6:19am UTC](https://forums.sifive.com/t/can-the-data-from-flash-memory-be-cached-in-hifive1-revb/6498 "2024-06-28T06:19:19Z")

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Hi, How to (configure) cache FLASH memory into cache line for read (from FLASH) in hifive1-revb? FE310 manual has only a short paragraph about the Instruction & data cache and it dont discuss on configuring and enablin…

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## [Issue occuring sifive board](https://forums.sifive.com/t/issue-occuring-sifive-board/6502)

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**Author:** [@MANU](https://forums.sifive.com/u/MANU)\
**Replies:** 2\
**Last updated:** [June 28, 2024, 5:56am UTC](https://forums.sifive.com/t/issue-occuring-sifive-board/6502 "2024-06-28T05:56:23Z")

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Open On-Chip Debugger 0.11.0 Licensed under GNU GPL v2 For bug reports, read OpenOCD: Bug Reporting DEPRECATED! use ‘adapter speed’ not ‘adapter\_khz’ DEPRECATED! use ‘adapter driver’ not ‘interface’ Info : auto-sel…

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## [SiFive FE310-G002: Using WFI together with MTIMECMP](https://forums.sifive.com/t/sifive-fe310-g002-using-wfi-together-with-mtimecmp/6365)

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**Author:** [@Vazhnov](https://forums.sifive.com/u/Vazhnov)\
**Replies:** 1\
**Last updated:** [January 7, 2024, 2:46am UTC](https://forums.sifive.com/t/sifive-fe310-g002-using-wfi-together-with-mtimecmp/6365 "2024-01-07T02:46:49Z")

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Hi! I’m trying to write a small program in Assembly to blink with LED(s) without a CPU loop, but using WFI (wait for interrupt), which should save some energy. The code is here: Blink-all-GPIO-timer\_asm. By some reaso…

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## [Measuring FE310 power consumption](https://forums.sifive.com/t/measuring-fe310-power-consumption/6428)

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**Author:** [@biosbob](https://forums.sifive.com/u/biosbob)\
**Replies:** 2\
**Last updated:** [March 14, 2024, 9:15pm UTC](https://forums.sifive.com/t/measuring-fe310-power-consumption/6428 "2024-03-14T21:15:51Z")

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i want to measure power consumption of the FE310 MCU on my hifive1-B board – and not the board as a whole… others boards i’ve worked with have a dedicated header where i could insert my ammeter… i’m specifically trying…

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## [Pre-initialized memory in spike simulator](https://forums.sifive.com/t/pre-initialized-memory-in-spike-simulator/6389)

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**Author:** [@vivekvpandya](https://forums.sifive.com/u/vivekvpandya)\
**Replies:** 1\
**Last updated:** [February 8, 2024, 10:23am UTC](https://forums.sifive.com/t/pre-initialized-memory-in-spike-simulator/6389 "2024-02-08T10:23:30Z")

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Is it possible to provide values that will be per-initialized in spike memory? Note this is not one time initialization but should be able to change with command line options for every run.

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## [\[SOLVED\] Getting FreedomStudio](https://forums.sifive.com/t/solved-getting-freedomstudio/6213)

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**Author:** [@Bartu](https://forums.sifive.com/u/Bartu)\
**Replies:** 3\
**Last updated:** [February 21, 2024, 11:31pm UTC](https://forums.sifive.com/t/solved-getting-freedomstudio/6213 "2024-02-21T23:31:45Z")

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Hi everybody, I got a HiFive revB and I’d like to program it with Freedom Studio IDE on Linux, but each time I try to download it from HiFive1 Rev B - SiFive, it just tells me to request information but not actually dow…

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## [Encounter an error while installing the SPIKE RISC-V simulator](https://forums.sifive.com/t/encounter-an-error-while-installing-the-spike-risc-v-simulator/6380)

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**Author:** [@boul-iisc](https://forums.sifive.com/u/boul-iisc)\
**Replies:** 2\
**Last updated:** [January 22, 2024, 1:41am UTC](https://forums.sifive.com/t/encounter-an-error-while-installing-the-spike-risc-v-simulator/6380 "2024-01-22T01:41:54Z")

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I first installed the RISC-V GNU toolchain (Installed for (Newlib/Linux multilib)) , then installed Spike RISC-V ISA Simulator. Next when I was trying to install the RISC-V Proxy Kernel and Boot Loader, I am facing some …

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## [Learning External interrupts](https://forums.sifive.com/t/learning-external-interrupts/6358)

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**Author:** [@Ted](https://forums.sifive.com/u/Ted)\
**Replies:** 2\
**Last updated:** [December 31, 2023, 8:19am UTC](https://forums.sifive.com/t/learning-external-interrupts/6358 "2023-12-31T08:19:27Z")

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Hi. I am a complete newbie, please don’t assume I know anything :confused: To start learning I have signed up for a course on EdX (Microcontroller Applications with RISC-V). Unfortunately the discussion board is no long…

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## [USB Port Select for Open On-Chip Debugger](https://forums.sifive.com/t/usb-port-select-for-open-on-chip-debugger/2214)

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**Author:** [@Ekkehard](https://forums.sifive.com/u/Ekkehard)\
**Replies:** 11\
**Last updated:** [December 20, 2023, 6:51am UTC](https://forums.sifive.com/t/usb-port-select-for-open-on-chip-debugger/2214 "2023-12-20T06:51:38Z")

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After having played around with the HiFive1 a bit using the Arduino IDE, I wanted to integrate it in my tool environment and leave the Arduino IDE behind. I understand the Open On-Chip Debugger is used not only for debu…

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## [Run bare-metal program on Spike with non-default memory map](https://forums.sifive.com/t/run-bare-metal-program-on-spike-with-non-default-memory-map/6340)

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**Author:** [@oscarh](https://forums.sifive.com/u/oscarh)\
**Replies:** 3\
**Last updated:** [December 4, 2023, 12:17am UTC](https://forums.sifive.com/t/run-bare-metal-program-on-spike-with-non-default-memory-map/6340 "2023-12-04T00:17:02Z")

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HI, I tried to load a bare-metal program into Spike, with my own memory map, the command line I used is: spike -m0x0:0x20000,0x100000:0x20000,0x10000000:0x80000, \\ 0x10080000:0x40000,0x40000000:0x20000,0x50000000:0x5800…

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## [Not able to launch the debugger in freedom studio application](https://forums.sifive.com/t/not-able-to-launch-the-debugger-in-freedom-studio-application/6327)

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**Author:** [@tejaswihegde11](https://forums.sifive.com/u/tejaswihegde11)\
**Replies:** 4\
**Last updated:** [November 9, 2023, 11:39am UTC](https://forums.sifive.com/t/not-able-to-launch-the-debugger-in-freedom-studio-application/6327 "2023-11-09T11:39:57Z")

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While bringing up RED V board following are the steps followed: Selected new freedom SDK project Selected the example program (hello world) Target device: HiFive1 Rev B build and launch config: checked launch config: j…

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## [Not able to launch the debugger](https://forums.sifive.com/t/not-able-to-launch-the-debugger/6324)

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**Author:** [@tejaswihegde11](https://forums.sifive.com/u/tejaswihegde11)\
**Replies:** 3\
**Last updated:** [November 9, 2023, 11:37am UTC](https://forums.sifive.com/t/not-able-to-launch-the-debugger/6324 "2023-11-09T11:37:50Z")

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Once the project is built, freedomstudio application starts to buffer when we try to create a new run/debug configuration in SiFive GDB SEGGER J-Link Debugging. I am using windows PC (64-bit) and 2021 version freedom st…

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## [News from the Kernel](https://forums.sifive.com/t/news-from-the-kernel/6329)

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**Author:** [@Knorkfox](https://forums.sifive.com/u/Knorkfox)\
**Replies:** 0\
**Last updated:** [November 8, 2023, 10:29pm UTC](https://forums.sifive.com/t/news-from-the-kernel/6329 "2023-11-08T22:29:39Z")

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The current progress is here: Compile Farm / Debian RISC-V build · GitLab The Kernel 6.6. boots headless with 8 GB of Ram ethernet and NVMe.

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## [Build and debug with toolchain](https://forums.sifive.com/t/build-and-debug-with-toolchain/6319)

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**Author:** [@jahro\_me](https://forums.sifive.com/u/jahro_me)\
**Replies:** 2\
**Last updated:** [November 4, 2023, 7:26am UTC](https://forums.sifive.com/t/build-and-debug-with-toolchain/6319 "2023-11-04T07:26:28Z")

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Hello, I am starting over with the HiFive 1 Rev B. I want to learn Assembly, C and Rust with this board and I want to have it down seriously. But I am a complete noob even when it comes to building a simple “Hello world…

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## [Question about RISC-V software interrupt](https://forums.sifive.com/t/question-about-risc-v-software-interrupt/6286)

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**Author:** [@oscarh](https://forums.sifive.com/u/oscarh)\
**Replies:** 4\
**Last updated:** [September 28, 2023, 5:24am UTC](https://forums.sifive.com/t/question-about-risc-v-software-interrupt/6286 "2023-09-28T05:24:39Z")

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I’m switching from ARM to RISC-V, still learning RISC-V. With ARM GiC, there are 16 software interrupt IDs (0~15). So Core A can send SGIs (Software Generated Interrupts) to Core B with different IDs to indicate the inte…

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